Cris Koutsougeras

Cris Koutsougeras, Ph.D.

Computer Science & Industrial Technology Department
Office: Fayard Hall 307C
Phone: (985) 549-2189
Email:

Quick Links
DARPA Grandchallenge project
The NASA Prototype Project
Athena Neural Network software
Preparing a Thesis?
Vita

Powering the development of the Gray Team, we have been proud to be part of the Grand Challenge in 2005. Kat-5 finishes 4th out of a total 5 vehicles that made it to the finish line after 132 miles of autonomous navigation. More...

Classes:
390 - Data Structures
460 - Neural Networks
401 - Programming Languages
235 - WWW Publishing & Web Servers
273 - Soft. for Analyzing Data
479 - Automata and Formal Languages
391 - Numerical Analysis

Select publications

C. Koutsougeras, Y. Liu, R. Zheng, "Event-driven Sensor Deployment Using Self Organizing Maps", to appear at the Intl. Journal of Sensor Networks (IJSNet) - Special Issue on: "Coverage Problems in Sensor Networks"
P. Trepagnier, J. Nagel, P. Kinney, C. Koutsougeras, M. Dooner, “KAT-5: Robust systems for autonomous vehicle navigation in challenging and unknown terrain", accepted for publication at the Journal of Field Robotics, March 2006.
Cris Koutsougeras And George Papadourakis, "Coupling Supervised and Unsupervised Techniques in Training Feed-Forward Nets", International Journal of Artificial Intelligence Tools (IJAIT), World Scientific Publishing Company, Vol. 1, no. 1, March 1992.
Arturo Hernandez-Aguirre, C. Koutsougeras, and B. Buckles, "Sample complexity for function learning tasks through linear neural networks", Intl. Journal n Artificial Intelligence Tools, Vol 11, No 4, pp 499-512, Dec. 2002
J. F. Vassilopoulos, C. Koutsougeras, and A. Hernandez-Acquire, "On the problem of training the Coulomb Energy Network", Intl. Journal n Artificial Intelligence Tools, Vol 11, No 4, pp 475-498, Dec. 2002
Georgiou, G., and C. Koutsougeras, "Two Phase Backpropagation", in IEEE Trans. on Circuits and Systems Part II: Analog and Digital Signal Processing, Vol. 39, no. 5, May 1992.
C. Koutsougeras, N. G. Bourbakis, and V. Gallardo, "Reverse engineering of real PCB level design using VERILOG HDL", Intl. Journal of Engineering Intelligent Systems, V10, No 2, pp 63-68, June 2002